VLSI systolic array architecture for the computation of the discrete fourier transform.

Description
Title: VLSI systolic array architecture for the computation of the discrete fourier transform.
Authors: Beraldin, Jean-Angelo.
Date: 1986
URL: http://hdl.handle.net/10393/5042
http://dx.doi.org/10.20381/ruor-10559
CollectionTh├Ęses, 1910 - 2010 // Theses, 1910 - 2010
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