Logic and circuit design of high speed digital systems.

Abstract

The speed of operation of digital systems can be increased by improving the logic or the circuit design. In this thesis, the logic and the integrated circuit design are considered using a unified procedure. The logic design is based upon partitioning the input variables according to their time sequence such that each logical operation is predetermined by intermediate outputs. This system is shown to be compatible with a two level current mode realization. The integration of this realization is economical of Silicon area and employs a novel non-linear collector-load structure.