Static task scheduling for configurable multiprocessors

dc.contributor.authorGroza, Voicu
dc.contributor.authorBolic, Miodrag
dc.contributor.authorMontcalm, Michael
dc.contributor.authorShapiro, Daniel
dc.date.accessioned2010-05-04T16:01:25Z
dc.date.available2010-05-04T16:01:25Z
dc.date.created2010
dc.date.issued2010-05-04T16:01:25Z
dc.description.abstractOur task scheduling pass implemented in the COINS compiler uses a Binary Linear Programming model for scheduling a program into a multiprocessor system-on-chip where each processor can be accelerated with instruction set extensions. We compare our work to state of the art approaches and estimate an average speedup of 4.01 in application execution time compared to a sequential approach. We estimate on average a 1.43 times speedup over the use of multiprocessor scheduling without instruction set extensions.
dc.description.sponsorshipNSERC
dc.identifier.urihttp://hdl.handle.net/10393/12896
dc.language.isoen
dc.subjectInstruction set extension
dc.subjectApplication specific instruction-set processor
dc.subjectMultiprocessor static scheduling
dc.titleStatic task scheduling for configurable multiprocessors
dc.typeWorking Paper

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