Static task scheduling for configurable multiprocessors
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Abstract
Our task scheduling pass implemented in the COINS compiler uses a Binary Linear Programming model for scheduling a program into a multiprocessor system-on-chip where
each processor can be accelerated with instruction set extensions. We compare our work to state of the art approaches
and estimate an average speedup of 4.01 in application execution time compared to a sequential approach. We estimate
on average a 1.43 times speedup over the use of multiprocessor scheduling without instruction set extensions.
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Keywords
Instruction set extension, Application specific instruction-set processor, Multiprocessor static scheduling
