ITS: An ILP-based combined instruction/task static scheduling algorithm

dc.contributor.author	Montcalm, Michael
dc.contributor.author	Shapiro, Daniel
dc.contributor.author	Groza, Voicu
dc.contributor.author	Bolic, Miodrag
dc.date.accessioned	2010-05-04T16:01:33Z
dc.date.available	2010-05-04T16:01:33Z
dc.date.created	2010
dc.date.issued	2010-05-04T16:01:33Z
dc.description.abstract	Our combined task and instruction static scheduling algorithm implemented in the COINS compiler uses an Integer Linear Programming model to find a schedule for a program on a symmetric multiprocessor system-on-chip. We compare our work to state of the art approaches and on average we find a speedup as high as 1.49 compared to a static task scheduling approach without instruction scheduling. Depending on the computation to communication ratio of the application we estimate an average speedup of 2.55 to 2.63 in application execution time compared to sequential code.
dc.description.sponsorship	NSERC
dc.identifier.uri	http://hdl.handle.net/10393/12897
dc.language.iso	en
dc.subject	Multiprocessor
dc.subject	Integer linear program
dc.subject	Static scheduling
dc.subject	MPSoC
dc.title	ITS: An ILP-based combined instruction/task static scheduling algorithm
dc.type	Working Paper

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