Identification of redundant faults.

Abstract

This thesis presents a redundancy identification (RI) method, namely, the Improved Structure Based (ISB) method, which identifies redundant faults in logic circuits. Redundant faults are those faults that are found not detectable by any test pattern in the process of automatic test pattern generation (ATPG) because they do not affect the normal circuit function. However, valuable time is wasted in ATPG algorithms due to the existence of redundant faults. The main purpose of ISB method is to locate redundant faults prior to applying ATPG algorithms. The ISB method does RI without search as opposed to most existing ATPG algorithms. The ISB method also presents significant improvement over existing structure-based methods for RI. The proposed ISB method can be applied efficiently to logic circuits with multiple-stem regions and multiple regions.