Shapiro, DanielParri, JonathanDesmarais, John-MarcKouri, AbdullahBergeron, Jean-PhilippeBolic, Miodrag2011-03-142011-03-1420112011-03-14http://hdl.handle.net/10393/19832http://www.site.uottawa.ca/~dshap092/The speed of software algorithms can be greatly improved by using a co-processor to offload computations from the main processor. Multiple co-processors can further increase the speed of a given algorithm. Based on this idea, three versions of an alpha blending algorithm were implemented on a NIOS II/f. The first implementation was entirely software based. This software based solution was then used as a baseline against which to test a single co-processor hardware solution and a multiple co-processor hardware solution. We showed that a single co-processor implementation achieved a speedup of 13.2 times, whereas the 2 co-processor solution achieved a speedup of 14.5 times with respect to this baseline. As further co-processors were added, the system became memory-bound as the algorithmic bottleneck moved from processing power to memory throughput.enalpha blendingInstruction set extensionimage processingFPGAWorking Paper