Soft Co-Processor Based Hardware Acceleration for Image Blending

FieldValue
dc.contributor.authorShapiro, Daniel
dc.contributor.authorParri, Jonathan
dc.contributor.authorDesmarais, John-Marc
dc.contributor.authorKouri, Abdullah
dc.contributor.authorBergeron, Jean-Philippe
dc.contributor.authorBolic, Miodrag
dc.date.accessioned2011-03-14T14:14:09Z
dc.date.available2011-03-14T14:14:09Z
dc.date.created2011
dc.date.issued2011-03-14
dc.identifier.urihttp://hdl.handle.net/10393/19832
dc.identifier.urihttp://www.site.uottawa.ca/~dshap092/
dc.description.abstractThe speed of software algorithms can be greatly improved by using a co-processor to offload computations from the main processor. Multiple co-processors can further increase the speed of a given algorithm. Based on this idea, three versions of an alpha blending algorithm were implemented on a NIOS II/f. The first implementation was entirely software based. This software based solution was then used as a baseline against which to test a single co-processor hardware solution and a multiple co-processor hardware solution. We showed that a single co-processor implementation achieved a speedup of 13.2 times, whereas the 2 co-processor solution achieved a speedup of 14.5 times with respect to this baseline. As further co-processors were added, the system became memory-bound as the algorithmic bottleneck moved from processing power to memory throughput.
dc.description.sponsorshipNSERC
dc.language.isoen
dc.subjectalpha blending
dc.subjectInstruction set extension
dc.subjectimage processing
dc.subjectFPGA
dc.titleSoft Co-Processor Based Hardware Acceleration for Image Blending
dc.typeWorking Paper
CollectionScience informatique et génie électrique - Publications // Electrical Engineering and Computer Science - Publications

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